A capacitance detection circuit 10 shown in FIG. 1 conventionally exists as a detection circuit of a capacitive sensor of which electrostatic capacitance (hereinafter, referred to simply as “capacitance”) changes corresponding to a variance in physical quantity.
This capacitance detection circuit 10 is a circuit that outputs a voltage signal corresponding to capacitance of a capacitive sensor Cs and is constructed of: the capacitive sensor Cs; an input protection circuit 11; a resistor Rh; a buffer amplifier 12; a signal wire 13 that connects the capacitive sensor Cs and the buffer amplifier 12; and the like. (Refer to, for example, Laid-open Japanese patent application No. 5-335493 as an input protection circuit.)
Voltage Vb is applied to an electrode of the capacitive sensor Cs and other electrode is connected to an input terminal of the buffer amplifier 12 via the signal wire 13. The input protection circuit 11 is a circuit that clamps high voltage, such as the voltage caused by static electricity accumulated in the signal wire 13, and is composed of diodes Dp and Dm connected between the signal wire 13 and positive power supply (+Vdd) and negative power supply (−Vdd).
The conventional capacitance detection circuit 10 operates as follows.
Now, suppose that parasitic capacitance (stray capacitance) of the signal wire 13 is Ci, and input voltage Vin of the buffer amplifier 12 is divided voltage of voltage Vb applied to the capacitive sensor Cs and determined by the capacitive sensor Cs and the parasitic capacitance Ci.Vin=Vb·(1/jωCi)/(1/jωCs+1/jωCi)
By the way, the voltage gain of the buffer amplifier 12 being 1,
Vout=Vin holds.
Therefore, when Vin is deleted in the above two equations, output voltage Vout is:Vout=Vb·Cs/(Cs+Ci)
Here, suppose that capacitance of the capacitive sensor Cs is represented by adding a capacitance component that depends on a variance in physical quantity (variant capacitance ΔC) and a capacitance component that does not depend on a variance in physical quantity (reference capacitance Cd), in other words, suppose that it is represented byCs=Cd+ΔC The above-mentioned output voltage Vout is:Vout=Vb·(Cd+ΔC)/(Cd+ΔC+Ci)
Here, when Vb is DC voltage, only AC component Vo of the output voltage Vout corresponding to a variance in physical quantity is a final signal. Therefore, the AC component Vo is:Vo=Vb·ΔC/(Cd+ΔC+Ci)  (Equation 1)
(Here, it is possible to state that Vo is component that depends on a temporal variance in physical quantity, “for example, ΔC”.)
As is apparent from the above Equation 1, to improve sensitivity of the capacitance detection circuit like this, it is preferable to diminish or null the parasitic capacitance Ci because ΔC, Cd and Vb are constant.
It is not easy, however, to diminish the parasitic capacitance Ci.
FIG. 2 is an equivalent circuit diagram when the capacitance detection circuit 10 shown in FIG. 1 operates normally (when diodes Dp and Dm are reversely biased.) Here, capacitance of diode Dp and capacitance of diode Dm (depletion layer capacitance when being reversely biased) are illustrated as capacitors Cdp and Cdm, respectively and input capacitance of the buffer amplifier 12 is illustrated as a capacitor Cg. The parasitic capacitance Ci is a total value of capacitance of these capacitors, Cdp, Cdm and Cg:Ci =Cdp+Cdm+Cg All of them, however, are parasitic capacitance produced by an essential circuit including the diode Dp, the diode Din, and the buffer amplifier 12.
Here, if it is possible to form the whole capacitance detection circuit 10 with a one-chip IC, it is possible to reduce the parasitic capacitance Ci substantially without providing the input protection circuit 11. However, when it is necessary to produce a product by assembling two or more kinds of parts or to implement a capacitive sensor Cs and a detection circuit at positions far apart or the like, it is inevitable to implement a capacitance detection circuit with a structure in which the capacitive sensor Cs and the detection circuit are separated. It is, therefore, unavoidable to provide the input protection circuit 11 in the input stage of the buffer amplifier 12. Consequently, parasitic capacitance caused by the input protection circuit 11 is added and there is a problem that the sensitivity of the capacitance detection circuit deteriorates.